ADP5022
Rev. C | Page 21 of 28
Input and Output Capacitor Properties
Use the following equation to determine the worst-case capa-
citance accounting for capacitor variation over temperature,
component tolerance, and voltage.
Use any good quality ceramic capacitors with the ADP5022
as long as they meet the minimum capacitance and maximum
ESR requirements. Ceramic capacitors are manufactured with
a variety of dielectrics, each with a different behavior over
temperature and applied voltage. Capacitors must have a
dielectric adequate to ensure the minimum capacitance over
the necessary temperature range and dc bias conditions. X5R
or X7R dielectrics with a voltage rating of 6.3 V or 10 V are
recommended for best performance. Y5V and Z5U dielectrics
are not recommended for use with any LDO because of their
poor temperature and dc bias characteristics.
C
EFF
= C
BIAS
?(1 TEMPCO) ?(1 TOL)
where:
C
BIAS
is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient
(TEMPCO) over 40癈 to +85癈 is assumed to be 15% for an
X5R dielectric. The tolerance of the capacitor (TOL) is assumed
to be 10% and C
BIAS
is 0.94 糉 at 1.8 V as shown in Figure 51.
Figure 51 depicts the capacitance vs. voltage bias characteristic
of a 0402 1 糉, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the
X5R dielectric is about ?5% over the 40癈 to +85癈 tempera-
ture range and is not a function of package or voltage rating.
Substituting these values into the following equation.
C
EFF
= 0.94 糉 ?(1 0.15) ?(1 0.1) = 0.719 糉
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
To guarantee the performance of the ADP5022, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors are evaluated for each application.
1.2
1.0
0.8
0.6
0.4
0.2
0
0
1
2
3
4
5
DC BIAS VOLTAGE (V)
6
Figure 51. Capacitance vs. Voltage Characteristic
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